PRODUCT DESCRIPTION

The AZP63 is a sine wave/CMOS to LVPECL buffer & translator optimized for very low phase noise (-165dBc/Hz). It is particularly useful in converting crystal or SAW based oscillators into LVPECL outputs greater than 1GHz of bandwidth.  For lower power consumption and reduced bandwidth, refer to the AZP5x family.

The AZP63 is one of a family of parts that provide options of fixed ÷1, fixed ÷2 and selectable ÷1, ÷2 modes as well as active high enable or active low enable functionality.

FEATURES

  • LVPECL outputs optimized for very low phase noise (-165dBc/Hz)
  • High bandwidth,  > 1GHz
  • Selectable ÷1, ÷2 output
  • Selectable Enable logic
  • 3.0V to 3.6V operation

APPLICATION

  • PECL clock source
  • Converting crystal or SAW based oscillators to LVPECL output

ORDER NUMBERS

Order Number Package
AZP63QG SON8
Description:

Low Phase Noise LVPECL Buffer & Divider

Input:

Sine or CMOS

Output:

LVPECL

Phase Noise:

-165dBc/Hz

Jitter:

36 fs

Bandwidth:

> 1.0GHz (÷1)
> 1.5GHZ (÷2)

Divider:

Selectable ÷1, ÷2

Enable:

Selectable Polarity

Supply Voltage:

3.3V

Packages:

Die

SON8