PRODUCT DESCRIPTION

The AZP92 is a ÷1 or ÷2 clock generation part specifically designed to accommodate Colpitts or Pierce based oscillators. Features are incorporated to reduce board components. A voltage reference and input biasing allows for easy oscillator interface.

The AZP92 provides a ÷ 2 mode of operation for more frequency options and is selectable with a single connection. A selectable enable is also provided which doubles as a reset when the AZP92 is in ÷2 mode. With a single connection, the enable can be selected to operate as active high or active low.

FEATURES

  • 3.0V to 5.5V Operation
  • Selectable Divide Ratio
  • Selectable Enable Polarity and Threshold (CMOS or PECL)
  • High Bandwidth, > 1.5 GHz (÷1)
  •                            > 3.0 GHz (÷2)
  • -145 dBc/Hz (÷1), -151 dBc/Hz (÷2) Typical Noise Floor

APPLICATION

  • Colpitts or Pierce based oscillators
  • General applications

ORDER NUMBERS

Order Number Package
AZP92NAG MLP8
Description:

LVPECL ÷1, ÷2 Clock Generator w/ Selectable Enable

Input:

LVPECL

Output:

LVPECL

Phase Noise:

-145dBc/Hz (÷1)
-151dBc/Hz (÷2)

Jitter:

n/a

Bandwidth:

> 1.5GHz (÷1)
> 3.0GHz (÷2)

Divider:

Selectable ÷1, ÷2

Enable:

Selectable Polarity & Threshold

Supply Voltage:

3.3V to 5.0V

Packages:

MLP8