Description
The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the AZ100ELT21 makes it ideal for applications that require the translation of a clock and a data signal. The AZ100ELT21 is a direct replacement for the ON Semi MC100ELT21.
Recommended for new designs
Block Diagram
- • 3.5ns propagation delay
- • PECL inputs
- • CMOS/TTL outputs
- • 5V analog supply
- • Industrial Temp Range: -40°C to 85°C
- • LVPECL to LVCMOS/LVTTL translation
- • PECL to CMOS/TTL translation
Order Numbers
| Part Number | Package | Dimensions | Quantity | MSL Rating |
|---|---|---|---|---|
| AZ100ELT21DGR1 | SOIC8 | .189/1.96in x .150/.157in | 1000 | 1 |
| AZ100ELT21TGR1 | MSOP8 | 0.12in x 0.12in | 1000 | 1 |